66 for (tmp = name; (*tmp !=
'\0'); ++tmp)
82 vfprintf(stderr, s, vl);
87 static inline void (*(*debug_(
const char *file,
unsigned int line,
88 const char *func))(
const char *, ...))()
94 #define DEBUG(s) (((debug_(__FILE__, __LINE__, __func__))s)(), (void)0)
96 #define DEBUG(s) (void)0
100 #if defined(WITH_STAR) || defined(WITH_CYCLONE)
102 #define ROM_ADDR(a) ((a) ^ 1)
105 #define ROM_ADDR(a) (a)
112 extern "C" int test_ctv(
unsigned char *dest,
int len);
133 uint8_t
mem[(0x10100 + 0x35)];
142 int poke_vram (
int addr,
unsigned char d);
143 int poke_cram (
int addr,
unsigned char d);
244 #define MCLK_CYCLES_PER_LINE 3416
245 #define M68K_CYCLES_PER_LINE (MCLK_CYCLES_PER_LINE / 7)
246 #define M68K_CYCLES_HBLANK ((M68K_CYCLES_PER_LINE * 36) / 209)
247 #define M68K_CYCLES_VDELAY ((M68K_CYCLES_PER_LINE * 36) / 156)
248 #define Z80_CYCLES_PER_LINE (MCLK_CYCLES_PER_LINE / 15)
249 #define Z80_CYCLES_HBLANK ((Z80_CYCLES_PER_LINE * 36) / 209)
250 #define Z80_CYCLES_VDELAY ((Z80_CYCLES_PER_LINE * 36) / 156)
251 #define NTSC_LINES 262
252 #define NTSC_VBLANK 224
254 #define NTSC_MCLK (MCLK_CYCLES_PER_LINE * NTSC_LINES * NTSC_HZ)
255 #define PAL_LINES 312
256 #define PAL_VBLANK 240
258 #define PAL_MCLK (MCLK_CYCLES_PER_LINE * PAL_LINES * PAL_HZ)
260 #define MD_UP_MASK (1) // 0x00001
261 #define MD_DOWN_MASK (1 << 1) // 0x00002
262 #define MD_LEFT_MASK (1 << 2) // 0x00004
263 #define MD_RIGHT_MASK (1 << 3) // 0x00008
264 #define MD_B_MASK (1 << 4) // 0x00010
265 #define MD_C_MASK (1 << 5) // 0x00020
266 #define MD_A_MASK (1 << 12) // 0x01000
267 #define MD_START_MASK (1 << 13) // 0x02000
268 #define MD_Z_MASK (1 << 16) // 0x10000
269 #define MD_Y_MASK (1 << 17) // 0x20000
270 #define MD_X_MASK (1 << 18) // 0x40000
271 #define MD_MODE_MASK (1 << 19) // 0x80000
272 #define MD_PAD_UNTOUCHED 0xf303f
274 #define MD_PICO_PENBTN_MASK (1 << 7) // 0x00080
295 *mem = (0x00 | 0x40);
308 *mem = (0x80 | 0x40);
333 static class md* md_musa;
334 unsigned int md_musa_ref;
335 class md* md_musa_prev;
337 bool md_set_musa(
bool set);
338 void md_set_musa_sync(
bool push);
341 static class md* md_cyclone;
342 unsigned int md_cyclone_ref;
343 class md* md_cyclone_prev;
345 bool md_set_cyclone(
bool set);
346 void md_set_cyclone_sync(
bool push);
347 uintptr_t checkpc(uintptr_t pc);
350 static class md* md_star;
351 unsigned int md_star_ref;
352 class md* md_star_prev;
354 bool md_set_star(
bool set);
355 void md_set_star_sync(
bool push);
358 unsigned int md_cz80_ref;
360 bool md_set_cz80(
bool set);
361 void md_set_cz80_sync(
bool push);
364 static class md* md_mz80;
365 unsigned int md_mz80_ref;
366 class md* md_mz80_prev;
368 bool md_set_mz80(
bool set);
369 void md_set_mz80_sync(
bool push);
372 static class md* md_drz80;
373 unsigned int md_drz80_ref;
374 class md* md_drz80_prev;
376 bool md_set_drz80(
bool set);
377 void md_set_drz80_sync(
bool push);
419 struct DrZ80 drz80 __attribute__((packed));
420 friend uintptr_t drz80_rebaseSP(uint16_t new_sp);
421 uintptr_t drz80_rebase_pc(uint16_t address);
422 friend uintptr_t drz80_rebasePC(uint16_t new_pc);
423 uintptr_t drz80_rebase_sp(uint16_t address);
424 friend void drz80_irq_callback();
432 friend void star_irq_callback(
void);
436 void musa_memory_map();
438 friend int musa_irq_callback(
int);
442 friend int cyclone_irq_callback(
int);
520 uint32_t vgm_dump_samples_total;
521 uint32_t vgm_dump_dac_wait;
522 unsigned int vgm_dump_dac_samples;
524 void vgm_dump_ym2612(uint8_t a1, uint8_t reg, uint8_t data);
525 void vgm_dump_sn76496(uint8_t data);
526 int vgm_dump_start(
const char *
name);
527 void vgm_dump_stop();
528 void vgm_dump_frame();
559 uint16_t pico_pen_coords[2];
571 int plug_in(
unsigned char *cart,
int len);
640 int patch(
const char *list,
unsigned int *errors,
641 unsigned int *applied,
unsigned int *reverted);
658 #define M68K_SR_CARRY (1<<0)
659 #define M68K_SR_OVERFLOW (1<<1)
660 #define M68K_SR_ZERO (1<<2)
661 #define M68K_SR_NEGATIVE (1<<3)
662 #define M68K_SR_EXTEND (1<<4)
664 #define M68K_SR_IP_MASK1 (1<<8)
665 #define M68K_SR_IP_MASK2 (1<<9)
666 #define M68K_SR_IP_MASK3 (1<<10)
667 #define M68K_SR_MI_STATE (1<<12)
668 #define M68K_SR_SUP_STATE (1<<13)
669 #define M68K_SR_TRACE_EN1 (1<<14)
670 #define M68K_SR_TRACE_EN2 (1<<15)
672 #define Z80_SR_CARRY (1<<0)
673 #define Z80_SR_ADD_SUB (1<<1)
674 #define Z80_SR_PARITY_OVERFLOW (1<<2)
675 #define Z80_SR_HALF_CARRY (1<<4)
676 #define Z80_SR_ZERO (1<<6)
677 #define Z80_SR_SIGN (1<<7)